3 Commits

Author	SHA1	Message	Date
root	5f147a89ff	Improve patch: use stable context anchors for cross-version compatibility ... The patch now uses amdgpu_gfx_parse_disable_cu + mutex_lock as context anchors instead of line numbers. These function calls are present in gfx_v10_0_get_cu_info() across all kernel versions (6.1+). Removed fake git index hashes. Replaced em-dash with -- for ASCII safety. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>	2026-05-18 21:27:34 +00:00
root	562c9c66b2	Update patch: integrated CC + SPI + RLC writes in gfx_v10_0_get_cu_info ... Single kernel patch now handles all three register writes during driver init. No UMR or systemd service needed post-boot. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>	2026-05-18 20:37:51 +00:00
root	f8fcde6129	BC-250 40 CU unlock: kernel patch, build script, and documentation ... Re-enable all 40 CUs on the AMD BC-250 (gfx1013 / Cyan Skillfish) via two register writes during amdgpu driver init: - CC_GC_SHADER_ARRAY_CONFIG: clears harvest enumeration mask - SPI_PG_ENABLE_STATIC_WGP_MASK: enables hardware wave dispatch to all WGPs Both required — neither alone is sufficient. Verified 1.61x compute scaling at 1500MHz (pp512: 230 → 372 tok/s) via controlled A/B/A testing. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>	2026-05-18 20:29:56 +00:00