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https://github.com/ps5-linux/ps5-linux-loader.git
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55 lines
1.7 KiB
C
55 lines
1.7 KiB
C
#ifndef HV_DEFEAT_0304_H
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#define HV_DEFEAT_0304_H
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#include "shellcode_kernel_args.h"
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extern uint32_t (*hv_iommu_set_buffers)(uint64_t cb2_pa, uint64_t cb3_pa,
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uint64_t eb_pa, uint64_t unk,
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int *n_devices);
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extern uint32_t (*hv_iommu_wait_completion)(void);
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int hv_defeat_0304(volatile shellcode_kernel_args *args_ptr);
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// tmr via ecam b0d18f2
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#ifndef ECAM_B0D18F2
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#define ECAM_B0D18F2 (0xF0000000ULL + 0x18ULL * 0x8000 + 2 * 0x1000)
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#define TMR_INDEX_OFF 0x80
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#define TMR_DATA_OFF 0x84
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#endif
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// tmr layout (hardware)
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#define TMR_BASE(n) ((n) * 0x10 + 0x00)
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#define TMR_LIMIT(n) ((n) * 0x10 + 0x04)
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#define TMR_CONFIG(n) ((n) * 0x10 + 0x08)
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#define TMR_REQUESTORS(n) ((n) * 0x10 + 0x0C)
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#define TMR_CFG_PERMISSIVE 0x3F07
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#define MAX_TMR 22
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#define MAX_SAVED_TMRS 8
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uint32_t tmr_read(uint64_t dmap, uint32_t addr);
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void tmr_write(uint64_t dmap, uint32_t addr, uint32_t val);
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int tmr_disable(uint64_t dmap);
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// Command buffer MMIO offsets
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#define IOMMU_MMIO_CB_HEAD 0xa000
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#define IOMMU_MMIO_CB_TAIL 0xa008
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// Queue constants
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#define IOMMU_CB_SIZE 0x2000
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#define IOMMU_CB_MASK (IOMMU_CB_SIZE - 1)
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#define IOMMU_CMD_ENTRY_SIZE 0x10
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// IOMMU softc field offsets
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#define IOMMU_SC_MMIO_VA 0x40
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#define IOMMU_SC_CB2_PTR 0x78
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#define IOMMU_SC_CB3_PTR 0x80
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#define IOMMU_SC_EB_PTR 0x60b90
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// Submit a single 16-byte command and wait for completion
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void iommu_submit_cmd(volatile shellcode_kernel_args *args_ptr, uint64_t *cmd);
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// Write 8 bytes to a physical address using IOMMU completion wait store
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void iommu_write8_pa(volatile shellcode_kernel_args *args_ptr, uint64_t pa,
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uint64_t val);
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void patch_vmcb(volatile shellcode_kernel_args *args_ptr);
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#endif
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